News

FMC TDC 1ns 5cha

30-05-2011: 3 prototypes assembled

Three prototypes of the Time to Digital converter have been built. We made a start of the VHDL coding for use on the SPEC PCI Express FMC carrier.

Simple PCIe FMC carrier SPEC

13-05-2011: V2 ready. Pre-production boards will be built.

The layout of the V2 of the SPEC board is ready. It is an improvement of version “1.1”. We will build 3 of these pre-production boards before we will order 70 boards.

Simple PCIe FMC carrier SPEC

11-05-2011: Design review of V2 held

Five engineers have reviewed version 2 of the SPEC card. Many small changes have been made to make the board better producable. E.g. instead of 23 resistor values only 10 will be needed.

White Rabbit Switch

wr-switch-software will now undergo major revision

Exploiting an exceptionally quiet perion in svn activities, I pushed the current software code before I’ll start merging quite some stuff in this repository. Build scripts, testing and such stuff will be integrated, but I’ll take a few days (up to a week) before I may really push to

FMC ADC 100M 14b 4cha

29-03-2011: V2 works on the SPEC

A first version of the firmware (single shot) has been tested on the SPEC along with a python test program. The acquired ADC data are read from DDR3 via DMA.

FMC ADC 100M 14b 4cha

25-03-2011: ADC card usable for radio telescopes?

The Oregan State University (OSU) refers to the Open ADC design on their Radio Telescope website. The aim of OSU’s project is to build a small radio telescope for use in the 1 to 2 GHz range which can be used to make RF maps of interesting celestial objects and provide observational images in real time on a web site.

FMC DEL 1ns 4cha

18-03-2011: Production files V1 ready

CERN’s design office reviewed the PCB layout and generated the production files that are in the same format as over 2000 other CERN designs.

FMC TDC 1ns 5cha

18-03-2011: Schematics design review held

After a first global schematics review in the week before, a second schematics design review was held with five engineers who found a few details that will improve the functioning and the documentation of the schematics.

Simple PCIe FMC carrier SPEC

24-02-2011: Design review of "V1.1" on 1/3/11

The debugging of the SPEC card is going really fine: all active components are fully tested, and most of the slow connections on the FMC connectors are tested with the fine delay module.