Compact Universal Timing Endpoint Based on White Rabbit with Artix7 - Cute-WR-A7
The Cute-WR-A7 is the enhanced version of the CUTE-WR-DP with an Xilinx Artix7 series FPGA. It inherits similar interfaces from Cute-WR-DP: two SFP ports, two SMA/LEMO connectors, FMC form factor with LPC connector, etc.
The three operation modes of Cute-WR-DP are also supported by Cute-WR-A7:
- Normal mode (Cute-WR-A7-NM)
- In Normal mode, Cute-WR-A7 acts as a normal WR node with one SFP port (SFP0).
- Cascade mode (Cute-WR-A7-CM)
- In CM mode, two ports act as one down-link (SFP1) and one up-link (SFP0) to support cascade topology. Two ports also support a simple switch function for normal Ethernet packets.
- Parallel mode (Cute-WR-A7-PM)
- In PM mode both ports act as down-link port connect to different WRS, provide redundancy to improve the reliability for safety related applications. The current firmware doesn’t support this function.
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Parent Projects
White Rabbit Node
WR Core Collection is a VHDL library containing the VHDL modules commonly used in White Rabbit ecosystem