High Performance MTCA.4 White Rabbit Receiver
The HP WR Timing Receiver is composed by two MTCA eRTM (Rear Transition Module) modules:
- Digital board (WR node), sitting in the slot 14. The board provides a redundant uplink to the WR network (2 SFP ports) and hosts the FPGA that implements the WR stack.
- RF board, using the slot 15. This board produces the Local Oscillator/Reference RF signals using a DDS as well as two configurable digital LVPECL clocks. They are distributed to the RTM/AMC slots of a MTCA.4 crate through the MTCA.4 RF Backplane The two boards always go together (stacked in a “sandwich” form) into the neighboring backplane slots 14 and 15. Inter-board communication is done through a high speed board-to-board cable.
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Image of the eRTM14/15 board set
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White Rabbit Node
WR Core Collection is a VHDL library containing the VHDL modules commonly used in White Rabbit ecosystem